A frequency locked loop (FLL) uses a controllable oscillator (e.g., a digitally controlled oscillator) to generate an output oscillating signal at a desired frequency from a given input oscillating signal that has a known frequency. Because the input oscillating signal has a known frequency, the input oscillating signal is often referred to as a reference clock.
In certain applications of FLLs, the input oscillating signal can be subject to missing pulses and/or distortions that can adversely affect the continued, stable generation of the output oscillating signal. For example, when implemented in a first near field communication (NFC) device that uses a recovered sinusoidal carrier signal transmitted by a second NFC device as the input oscillating signal, the input oscillating signal can be heavily distorted due to the way the second NFC device modulates information on the carrier (e.g., using amplitude modulation). The distortions can be so heavy that one or more of the carrier's pulses that repetitively occur at the frequency of the carrier can be effectively missing and/or distorted to such a high-degree that the recovered carrier will affect the continued, stable generation of the output oscillating signal at the desired frequency.
In such an application, the output oscillating signal can be used by the first NFC device to, for example, process signals received from the second NFC device and/or to generate signals for transmission to the second NFC device.
The present disclosure will be described with reference to the accompanying drawings. The drawing in which an element first appears is typically indicated by the leftmost digit(s) in the corresponding reference number.